Method for preventing the formation of electrical shorts via contact ILD voids

US7741191B2 · kind B2 · utility

Assignee

• GlobalFoundries Inc. · KY

Inventors

• Kai Frohberg · Meißen, DE
• Sven Mueller · Rockenberg, DE
• Frank Feustel · Dresden, DE

Key dates

• Filing date: Dec 5, 2007
• Grant date: Jun 22, 2010
• Expiry date: Oct 28, 2028

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/601
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Densely spaced gates of field effect transistors usually lead to voids in a contact interlayer dielectric. If such a void is opened by a contact via and filled with conductive material, an electrical short between neighboring contact regions of neighboring transistors may occur. By forming a recess between two neighboring contact regions, the void forms at a lower level. Thus, opening of the void by contact vias is prevented.