Process for producing an MOS transistor and corresponding integrated circuit
US7749858B2 · kind B2 · utility
0Cited by
4References
17Claims
0Family size
Assignees
Inventors
Key dates
| Filing date | Jul 17, 2006 |
| Grant date | Jul 6, 2010 |
| Priority date | — |
| Expiry date | Aug 16, 2026 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76254
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A silicon substrate (SOI) is placed on a buried oxide layer (BOX). An MOS transistor is produced in an active zone of the substrate which is defined by an isolating region. A gate region and source and drain regions, which between them define a channel, are produced so that the gate region extends above the channel. The isolating region is produced by localized formation of a zone of material that can be selectively etched with respect to silicon. That material is selectively etched, and a dielectric material is deposited in the etched feature. The etching is carried out after the gate region has been produced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.