Treatment of plasma damaged layer for critical dimension retention, pore sealing and repair
US7750479B2 · kind B2 · utility
7Cited by
19References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 19, 2007 |
| Grant date | Jul 6, 2010 |
| Priority date | — |
| Expiry date | Jul 14, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An interconnect structure and method of fabricating the same in which the critical dimension of the conductive features are not altered by a plasma damaged layer are provided. In accordance with the present invention, a chemically etching dielectric material is subjected to a treatment step which modifies the density of the dielectric material such that the treated surfaces become denser than the bulk dielectric not subjected to the treatment. The treatment step is performed prior to deposition of the noble metal liner.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.