Process and temperature tolerant non-volatile memory
US7755948B2 · kind B2 · utility
2Cited by
0References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 19, 2008 |
| Grant date | Jul 13, 2010 |
| Priority date | — |
| Expiry date | Nov 18, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C17/18
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A nonvolatile memory comprising an array of memory cells and sense amplifiers, each sense amplifier using a keeper circuit to provide an amount of current to compensate for bit line leakage current in the memory array. The amount of current from the keeper depends on the temperature of the memory and the speed of the process used to make the memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.