Design rules checking augmented with pattern matching
US7757190B2 · kind B2 · utility
7Cited by
0References
12Claims
0Family size
Assignee
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Key dates
| Filing date | Dec 19, 2006 |
| Grant date | Jul 13, 2010 |
| Priority date | — |
| Expiry date | Dec 15, 2027 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P90/02
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Layout patterns are identified as problematic when they have particular parameters required to exceed standard limits. The problematic layout patterns are associated with preferred design rules in a DRC-Plus deck. Layout data is scanned to generate match locations of any problematic layout patterns. The match locations are forwarded to a DRC engine that compares layout parameters of the match locations to corresponding preferred layout rules in the DRC-Plus deck. The DRC-Plus check results are used to modify the layout to improve manufacturability of the layout.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.