Multi-bit non-volatile memory device, method of operating the same, and method of fabricating the same
US7759196B2 · kind B2 · utility
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4References
12Claims
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Key dates
| Filing date | Sep 12, 2008 |
| Grant date | Jul 20, 2010 |
| Priority date | — |
| Expiry date | Jan 7, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/037
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A multi-bit non-volatile memory device and methods of operating and fabricating the same may be provided. The memory device may include a channel region formed in a semiconductor substrate, and a source and drain that form a Schottky contact with the channel region. Also, a central gate electrode may be located on a portion of the channel region, and first and second sidewall gate electrodes may be formed on the channel region along the outer sides of the central gate electrode. First and second storage nodes may be formed between the channel region and the sidewall gate electrodes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.