Patent · US Active

Method and apparatus for multithreading on a programmable logic device

US7770179B1 · kind B1 · utility

10Cited by

18References

11Claims

0Family size

Assignee

XILINX, INC. · US

Inventors

Philip B. James-Roxby · Longmont, US
Gordon J. Brebner · Monte Sereno, US
Eric R. Keller · Boulder, US
Chidamber R. Kulkarni · Hyderabad, IN

Key dates

Filing date	Jan 30, 2004
Grant date	Aug 3, 2010
Priority date	—
Expiry date	Apr 16, 2029

Classification

Technology area (CPC G)Physics
CPC primaryG06F30/34
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Programmable architecture for implementing a message processing system using an integrated circuit is described. In an example, configurable logic of the integrated circuit is configured to have a plurality of thread circuits and an interconnection topology amongst the plurality of thread circuits. Messages are concurrently processed using the plurality of thread circuits. Operation of at least one thread circuit of the plurality of thread circuits is controlled in accordance with control data received via the interconnection topology from at least one other thread circuit of the plurality of thread circuits.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.