Method of forming conformal silicon layer for recessed source-drain
US7772074B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 18, 2007 |
| Grant date | Aug 10, 2010 |
| Priority date | — |
| Expiry date | Jun 23, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/822
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Processes for non-selectively forming one or more conformal silicon-containing epitaxial layers on recess corners are disclosed. Specific embodiments pertain to the formation and treatment of epitaxial layers in semiconductor devices, for example, Metal Oxide Semiconductor Field Effect Transistor (MOSFET) devices. In specific embodiments, the formation of a non-selective epitaxial layer involves exposing a substrate in a process chamber to deposition gases including a silicon source such as silane and a higher order silane, followed by heating the substrate to promote solid phase epitaxial growth.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.