Method for integrating selective low-temperature ruthenium deposition into copper metallization of a semiconductor device
US7776740B2 · kind B2 · utility
3Cited by
26References
19Claims
0Family size
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Key dates
| Filing date | Jan 22, 2008 |
| Grant date | Aug 17, 2010 |
| Priority date | — |
| Expiry date | Mar 21, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for integrating low-temperature selective Ru metal deposition into manufacturing of semiconductor devices to improve electromigration and stress migration in bulk Cu metal. The method includes providing a patterned substrate containing a recessed feature in a dielectric layer, where the recessed feature is at least substantially filled with planarized bulk Cu metal, heat-treating the bulk Cu metal and the dielectric layer in the presence of H2, N2, or NH3, or a combination thereof, and selectively depositing a Ru metal film on the heat-treated planarized bulk Cu metal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.