Resistive memory structure with buffer layer

US7777215B2 · kind B2 · utility

Assignee

• MACRONIX INTERNATIONAL CO., LTD. · TW

Inventors

• Wei-Chih Chien · Yorktown, US
• Kuo-Pin Chang · Miaoli City, TW
• Erh-Kun Lai · Taichung, TW
• Kuang Yeu Hsieh · Hsinchu, TW

Key dates

• Filing date: Jul 18, 2008
• Grant date: Aug 17, 2010
• Expiry date: Aug 4, 2028

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y10S438/90

Abstract

A memory device comprises first and second electrodes with a memory element and a buffer layer located between and electrically coupled to them. The memory element comprises one or more metal oxygen compounds. The buffer layer comprises at least one of an oxide and a nitride. Another memory device comprises first and second electrodes with a memory element and a buffer layer, having a thickness of less than 50 Å, located between and electrically coupled to them. The memory comprises one or more metal oxygen compounds. An example of a method of fabricating a memory device includes forming first and second electrodes. A memory, located between and electrically coupled to the first and the second electrodes, is formed; the memory comprises one or more metal oxygen compounds and the buffer layer comprises at least one of an oxide and a nitride.