Wei-Chih Chien
35Patents
8h-index
32Co-inventors
71Inventor score
Filing activity: Jul 2, 2008 → Jan 13, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8067815B2 | Aluminum copper oxide based memory devices and methods for manufacture | Electricity | 102 | Active |
| US7777215B2 | Resistive memory structure with buffer layer | Emerging Cross-Sectional Technologies | 53 | Active |
| US8279656B2 | Nonvolatile stacked nand memory | Physics | 15 | Active |
| US7960224B2 | Operation method for multi-level switching of metal-oxide based RRAM | Electricity | 14 | Active |
| US10157671B1 | Fast switching 3D cross-point array | Physics | 12 | Active |
| US8699258B2 | Verification algorithm for metal-oxide resistive memory | Physics | 11 | Active |
| US7943920B2 | Resistive memory structure with buffer layer | Emerging Cross-Sectional Technologies | 10 | Active |
| US9336879B2 | Multiple phase change materials in an integrated circuit for system on a chip application | Electricity | 10 | Active |
| US10312276B2 | Image sensor package to limit package height and reduce edge flare | Electricity | 7 | Active |
| US8331127B2 | Nonvolatile memory device having a transistor connected in parallel with a resistance switching device | Physics | 7 | Active |
| US8962466B2 | Low temperature transition metal oxide for memory device | Electricity | 6 | Active |
| US8134865B2 | Operating method of electrical pulse voltage for RRAM application | Electricity | 6 | Active |
| US9324428B1 | Memory device and operation method thereof | Physics | 6 | Active |
| US8149610B2 | Nonvolatile memory device | Physics | 3 | Active |
| US9680095B2 | Resistive RAM and fabrication method | Electricity | 3 | Active |
| US8295075B2 | Resistive memory and method for controlling operations of the same | Physics | 3 | Active |
| US9882126B2 | Phase change storage device with multiple serially connected storage regions | Electricity | 3 | Active |
| US7981742B2 | Semiconductor device, data element thereof and method of fabricating the same | Electricity | 2 | Active |
| US8488362B2 | Graded metal oxide resistance based semiconductor memory device | Electricity | 2 | Active |
| US8048721B2 | Method for filling multi-layer chip-stacked gaps | Electricity | 2 | Active |
| US9196828B2 | Resistive memory and fabricating method thereof | Electricity | 1 | Active |
| US8772106B2 | Graded metal oxide resistance based semiconductor memory device | Electricity | 1 | Active |
| US11557342B2 | Multi-level cell threshold voltage operation of one-selector-one-resistor structure included in a crossbar array | Electricity | 0 | Active |
| US9035275B2 | Three dimensional memory array adjacent to trench sidewalls | Electricity | 0 | Active |
| US9276090B2 | Self-rectified device, method for manufacturing the same, and applications of the same | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.