Self-aligned tunneling pocket in field-effect transistors and processes to form same
US7777282B2 · kind B2 · utility
8Cited by
15References
31Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 13, 2008 |
| Grant date | Aug 17, 2010 |
| Priority date | — |
| Expiry date | Sep 13, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/017
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A microelectronic device includes a tunneling pocket within an asymmetrical semiconductive body including source- and drain wells. The tunneling pocket is formed by a self-aligned process by removing a dummy gate electrode from a gate spacer and by implanting the tunneling pocket into the semiconductive body or into an epitaxial film that is part of the semiconductive body.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.