Prashant Majhi
120Patents
11h-index
96Co-inventors
79Inventor score
Filing activity: Apr 14, 2004 → Apr 14, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7361538B2 | Transistors and methods of manufacture thereof | Electricity | 66 | Expired |
| US8384122B1 | Tunneling transistor suitable for low voltage operation | Electricity | 49 | Active |
| US10651153B2 | Three-dimensional (3D) memory with shared control circuitry using wafer-to-wafer bonding | Electricity | 44 | Active |
| US7759142B1 | Quantum well MOSFET channels having uni-axial strain caused by metal source/drains, and conformal regrowth source/drains | Electricity | 25 | Active |
| US7435987B1 | Forming a type I heterostructure in a group IV semiconductor | Electricity | 24 | Active |
| US7947971B2 | Quantum well MOSFET channels having uni-axial strain caused by metal source/drains, and conformal regrowth source/drains | Electricity | 20 | Active |
| US7332433B2 | Methods of modulating the work functions of film layers | Electricity | 17 | Expired |
| US7928426B2 | Forming a non-planar transistor having a quantum well channel | Electricity | 16 | Active |
| US7629603B2 | Strain-inducing semiconductor regions | Electricity | 16 | Active |
| US8936976B2 | Conductivity improvements for III-V semiconductor devices | Electricity | 13 | Active |
| US8258498B2 | Quantum well MOSFET channels having uni-axial strain caused by metal source/drains, and conformal regrowth source/drains | Electricity | 12 | Active |
| US9559215B1 | Method and apparatus for making p-channel thin film transistors for OLED and LED active matrix flat panel displays | Electricity | 11 | Active |
| US8237153B2 | Forming a non-planar transistor having a quantum well channel | Electricity | 9 | Active |
| US10868246B2 | Conductive bridge random access memory (CBRAM) devices with low thermal conductivity electrolyte sublayer | Physics | 9 | Active |
| US7777282B2 | Self-aligned tunneling pocket in field-effect transistors and processes to form same | Electricity | 8 | Active |
| US9653680B2 | Techniques for filament localization, edge effect reduction, and forming/switching voltage reduction in RRAM devices | Electricity | 8 | Active |
| US10439134B2 | Techniques for forming non-planar resistive memory cells | Electricity | 7 | Active |
| US7696517B2 | NMOS transistors that mitigate fermi-level pinning by employing a hafnium-silicon gate electrode and high-k gate dieletric | Electricity | 6 | Active |
| US11075207B2 | SRAM using 2T-2S | Electricity | 5 | Active |
| US10084058B2 | Quantum well MOSFET channels having lattice mismatch with metal source/drains, and conformal regrowth source/drains | Electricity | 5 | Active |
| US10090461B2 | Oxide-based three-terminal resistive switching logic devices | Electricity | 5 | Active |
| US8501508B2 | Method of forming quantum well mosfet channels having uni-axial strains caused by metal source/drains | Electricity | 5 | Active |
| US10355205B2 | Resistive memory cells including localized filamentary channels, devices including the same, and methods of making the same | Electricity | 4 | Active |
| US7545003B2 | Defect-free source/drain extensions for MOSFETS having germanium based channel regions | Electricity | 4 | Active |
| US8236686B2 | Dual metal gates using one metal to alter work function of another metal | Electricity | 4 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.