Integrated circuit having NAND memory cell strings
US7778073B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 15, 2007 |
| Grant date | Aug 17, 2010 |
| Priority date | — |
| Expiry date | Jun 23, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B69/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments of the present invention relate generally to integrated circuits and methods for manufacturing an integrated circuit. In an embodiment of the invention, an integrated circuit having a memory cell is provided. The memory cell may include a trench in a carrier, a charge trapping layer structure in the trench, the charge trapping layer structure comprising at least two separate charge trapping regions, electrically conductive material at least partially filled in the trench, and source/drain regions next to the trench.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.