Nickel alloy salicide transistor structure and method for manufacturing same
US7781322B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 4, 2003 |
| Grant date | Aug 24, 2010 |
| Priority date | — |
| Expiry date | Oct 31, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/664
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Provided are exemplary methods for forming a nickel silicide layer and semiconductor devices incorporating a nickel silicide layer that provides increased stability for subsequent processing at temperatures above 450° C. In particular, the nickel silicide layer is formed from a nickel alloy having a minor portion of an alloying metal, such as tantalum, and exhibits reduced agglomeration and retarded the phase transition between NiSi and NiSi2 to suppress increases in the sheet resistance and improve the utility for use with fine patterns. As formed, the nickel silicide layer includes both a lower layer consisting primarily of nickel and silicon and a thinner upper layer that incorporates the majority of the alloying metal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.