Methods to mitigate plasma damage in organosilicate dielectrics using a protective sidewall spacer
US7781332B2 · kind B2 · utility
8Cited by
7References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 19, 2007 |
| Grant date | Aug 24, 2010 |
| Priority date | — |
| Expiry date | Nov 27, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Plasma damage in ultra low k dielectric materials during formation of a dual damascene metal interconnect structure is reduced by providing a protective spacer on sidewalls of a line trench. A densified trench bottom region may be additionally formed directly beneath an exposed horizontal surface of the line trench. The protective spacer and/or the densified trench bottom region protects an ultra low k intermetal dielectric layer from plasma damage during a plasma strip process that is used to remove a disposable via fill plug employed in the dual damascene metal interconnect structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.