Method of operating a flash memory device
US7782667B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 12, 2008 |
| Grant date | Aug 24, 2010 |
| Priority date | — |
| Expiry date | Sep 17, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5646
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of operating a flash memory device includes reading a first bit data by employing a first read voltage or a second read voltage higher than the first read voltage according to a program state of a first flag cell. The first flag cell is programmed when the first bit data is programmed into the MLC. A second bit data may be read by employing a third read voltage that is higher than the first read voltage or the second read voltage, or by employing the first read voltage and the third read voltage according to a program state of a second flag cell. The second flag cell is programmed when the second bit data is programmed into the MLC. Alternatively to reading the second bit data, the second bit data is fixed to a set data and the set data is output.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.