Generation of a specification of a network packet processor
US7784014B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 3, 2007 |
| Grant date | Aug 24, 2010 |
| Priority date | — |
| Expiry date | Jun 16, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method is provided for generating a hardware description language (HDL) specification of a network packet processor from a textual language specification of the processing of network packets by the processor. The processor includes a look-ahead stage, an operation stage, an insert/remove stage, and an interleave stage. The textual language specification identifies the ports of the processor. The textual language specification includes formats for the type or types of the incoming and outgoing network packets. Each format includes the fields of the type of network packet. The textual language specification includes a procedure for each input port and for each type of incoming network packet received at the input port. Each procedure includes one or more actions for modifying the fields of a type of network packet as a function of state data and/or the fields of the type of network packet.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.