Patent · US Active

Semiconductor wafer and process for its production

US7785706B2 · kind B2 · utility

13Cited by

8References

20Claims

0Family size

Assignee

Siltronic AG · DE

Inventors

Thomas Schroeder · Berlin, DE
Peter Storck · Mehring, DE
Hans Joachim Muessig · Dresden, DE

Key dates

Filing date	Mar 26, 2008
Grant date	Aug 31, 2010
Priority date	—
Expiry date	May 23, 2028

Classification

Technology area (CPC Y)Emerging Cross-Sectional Technologies
CPC primaryY10T428/26
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A layered semiconductor wafer contains the following layers in the given order:

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.