Electrical fuse having sublithographic cavities thereupon
US7785937B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 17, 2009 |
| Grant date | Aug 31, 2010 |
| Priority date | — |
| Expiry date | Sep 17, 2029 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49107
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An electrical fuse and a first dielectric layer thereupon are formed on a semiconductor substrate. Self-assembling block copolymers containing two or more different polymeric block components are applied into a recessed region surrounded by a dielectric template layer. The self-assembling block copolymers are then annealed to form a pattern of multiple circles having a sublithographic diameter. The pattern of multiple circles is transferred into the first dielectric layer by a reactive ion etch, wherein the portion of the first dielectric layer above the fuselink has a honeycomb pattern comprising multiple circular cylindrical holes. A second dielectric layer is formed over the circular cylindrical holes by a non-conformal chemical vapor deposition and sublithographic cavities are formed on the fuselink. The sublithographic cavities provide enhanced thermal insulation relative to dielectric materials to the fuselink so that the electrical fuse may be programmed with less programming current.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.