Method of making double-gated self-aligned finFET having gates of different lengths

US7785944B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Huilong Zhu · Poughkeepsie, US
• Bruce B. Doris · Brewster, US
• Xinlin Wang · Irvine, US
• Jochen Beintner · Wappingers Falls, US
• Ying Zhang · Santa Clara, US
• Philip J. Oldiges · Lagrangeville, US

Key dates

• Filing date: Mar 24, 2008
• Grant date: Aug 31, 2010
• Expiry date: Mar 24, 2028

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/6217

Abstract

A method is provided of making a gated semiconductor device. Such method can include patterning a single-crystal semiconductor region of a substrate to extend in a lateral direction parallel to a major surface of a substrate and to extend in a direction at least substantially vertical and at least substantially perpendicular to the major surface, the semiconductor region having a first side and a second side opposite, e.g., remote from the first side. A first gate may be formed overlying the first side, the first gate having a first gate length in the lateral direction. A second gate may be formed overlying the second side, the second gate having a second gate length in the lateral direction which is different from the first gate length. In one embodiment, the second gate length may be shorter than the first gate length. In one embodiment, the first gate may consist essentially of polycrystalline silicon germanium and the second gate may consist essentially of polysilicon.