Design structures for high-voltage integrated circuits

US7786535B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Michel J. Abou-Khalil · South Burlington, US
• Robert J. Gauthier, Jr. · South Burlington, US
• Tom C. Lee · South Burlington, US
• Junjun Li · Williston, US
• Christopher S. Putnam · South Burlington, US
• Souvick Mitra · South Burlington, US

Key dates

• Filing date: Mar 31, 2008
• Grant date: Aug 31, 2010
• Expiry date: Dec 14, 2028

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D86/201

Abstract

Design structures for high-voltage integrated circuits. The design structure, which is formed using a semiconductor-on-insulator (SOI) substrate, may include device structure with a semiconductor body positioned between first and second gate electrodes. The first and second gate electrodes and the semiconductor body may be formed from the monocrystalline SOI layer of the SOI substrate. A dielectric layer separates each of the first and second gate electrodes from the semiconductor body. These dielectric layers are formed by defining trenches in the SOI layer and filling the trenches with a dielectric material, which may occur concurrently with a process forming other device isolation regions.