Semiconductor device and method of forming through hole vias in die extension region around periphery of die
US7790576B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 29, 2007 |
| Grant date | Sep 7, 2010 |
| Priority date | — |
| Expiry date | Mar 17, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/30105
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor wafer contains a plurality of semiconductor die. The semiconductor wafer is diced to separate the semiconductor die. The semiconductor die are transferred onto a carrier. A die extension region is formed around a periphery of the semiconductor die on the carrier. The carrier is removed. A plurality of through hole vias (THV) is formed in first and second offset rows in the die extension region. A conductive material is deposited in the THVs. A first RDL is formed between contact pads on the semiconductor die and the THVs. A second RDL is formed on a backside of the semiconductor die in electrical contact with the THVs. An under bump metallization is formed in electrical contact with the second RDL. Solder bumps are formed on the under bump metallization. The die extension region is singulated to separate the semiconductor die.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.