Mask pattern correcting method, mask pattern inspecting method, photo mask manufacturing method, and semiconductor device manufacturing method
US7794897B2 · kind B2 · utility
2Cited by
2References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 2, 2005 |
| Grant date | Sep 14, 2010 |
| Priority date | — |
| Expiry date | Dec 28, 2027 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03F1/36
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A pattern correcting method for correcting a design pattern to form a desired pattern on a wafer is disclosed, which comprises defining an allowable dimensional change quantity of each of design patterns, defining a pattern correction condition for the each design pattern based on the allowable dimensional change quantity defined for the each design pattern, and correcting the each design pattern based on the pattern correction condition defined for the each design pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.