Methods of achieving linear capacitance in symmetrical and asymmetrical EMI filters with TVS
US7795987B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 16, 2007 |
| Grant date | Sep 14, 2010 |
| Priority date | — |
| Expiry date | Apr 15, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A transient voltage suppressing (TVS) circuit with uni-directional blocking and symmetric bi-directional blocking capabilities integrated with an electromagnetic interference (EMI) filter supported on a semiconductor substrate of a first conductivity type. The TVS circuit integrated with the EMI filter further includes a ground terminal disposed on the surface for the symmetric bi-directional blocking structure and at the bottom of the semiconductor substrate for the uni-directional blocking structure and an input and an output terminal disposed on a top surface with at least a Zener diode and a plurality of capacitors disposed in the semiconductor substrate to couple the ground terminal to the input and output terminals with a direct capacitive coupling without an intermediate floating body region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.