Patent · US Active

Reduced capacity carrier, transport, load port, buffer system

US7798758B2 · kind B2 · utility

9Cited by
9References
8Claims
0Family size

Assignee

Inventors

Key dates

Filing dateNov 7, 2006
Grant dateSep 21, 2010
Priority date
Expiry dateNov 7, 2026

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L21/67778
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A semiconductor workpiece processing system having at least one processing apparatus for processing workpieces, a primary transport system, a secondary transport system and one or more interfaces between first transport system and second transport system. The primary and secondary transport systems each have one or more sections of substantially constant velocity and in queue sections communicating with the constant velocity sections.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.