Patent · US Active

Method of fabricating a power electronic device

US7799614B2 · kind B2 · utility

20Cited by
8References
22Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 21, 2007
Grant dateSep 21, 2010
Priority date
Expiry dateJun 20, 2028

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/181
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

An electronic device and method is disclosed. In one embodiment, a method includes providing an electrically insulating substrate. A first electrically conductive layer is applied over the electrically insulating substrate. A first semiconductor chip is placed over the first electrically conductive layer. An electrically insulating layer is applied over the first electrically conductive layer. A second electrically conductive layer is applied over the electrically insulating layer. A through connection is formed in the electrically insulating layer to couple the second electrically conductive layer to the first electrically conductive layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.