System and method for removal of photoresist in transistor fabrication for integrated circuit manufacturing
US7799685B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 4, 2004 |
| Grant date | Sep 21, 2010 |
| Priority date | — |
| Expiry date | Apr 24, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/67207
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a technique for fabricating an integrated circuit to include an active device structure which supports an electrical interconnect structure, a photoresist layer is used prior to forming an electrical interconnect structure on the active device structure. The photoresist and related residues are removed by exposing the photoresist and exposed regions of the active device structure to one or more reactive species that are generated using a gas mixture including hydrogen gas, as a predominant source of the reactive species, in a plasma source such that the photoresist and residues are continuously exposed to hydrogen-based reactive species. An associated system architecture is described which provides for a substantial flow of hydrogen gas in the process chamber.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.