Power semiconductor device connected in distinct layers of plastic
US7800217B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 10, 2007 |
| Grant date | Sep 21, 2010 |
| Priority date | — |
| Expiry date | May 1, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/351
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A power semiconductor device and a method for its production. The power semiconductor device has at least one power semiconductor chip, which has on its top side and on its back side large-area electrodes. The electrodes are electrically in connection with external contacts by means of connecting elements, the power semiconductor chip and the connecting elements being embedded in a plastic package. This plastic package has a number of layers of plastic, which are pressed one on top of the other and have plane-parallel upper sides. The connecting elements are arranged on at least one of the plane-parallel upper sides, between the layers of plastic pressed one on top of the other, as a patterned metal layer and are electrically in connection with the external contacts by means of contact vias through at least one of the layers of plastic.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.