Method for using a memory cell comprising switchable semiconductor memory element with trimmable resistance
US7800933B2 · kind B2 · utility
17Cited by
52References
50Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 31, 2006 |
| Grant date | Sep 21, 2010 |
| Priority date | — |
| Expiry date | Jul 31, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2013/0073
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A nonvolatile memory cell comprising a diode formed of semiconductor material can store memory states by changing the resistance of the semiconductor material by application of a set pulse (decreasing resistance) or a reset pulse (increasing resistance.) In preferred embodiments, set pulses are applied with the diode under forward bias, while reset pulses are applied with the diode in reverse bias. By switching resistivity of the semiconductor material of the diode, a memory cell can be either one-time programmable or rewriteable, and can achieve two, three, four, or more distinct data states.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.