Self-aligned patterning method by using non-conformal film and etch back for flash memory and other semiconductor applications

US7803680B2 · kind B2 · utility

Assignee

• Spansion LLC. · US

Inventors

• Shenging Fang · Fremont, US
• Kuo-Tung Chang · Saratoga, US
• Tim Thurgate · Sunnyvale, US
• Youseok Suh · Cupertino, US
• Allison Holbrook · San Jose, US

Key dates

• Filing date: Jan 12, 2007
• Grant date: Sep 28, 2010
• Expiry date: Oct 31, 2027

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B69/00

Abstract

A method for fabricating a memory device with a self-aligned trap layer which is optimized for scaling is disclosed. In the present invention, a non-conformal oxide is deposited over the charge trapping layer to form a thick oxide on top of the core source/drain region and a pinch off and a void at the top of the STI trench. An etch is performed on the pinch-off oxide and the thin oxide on the trapping layer on the STI oxide. The trapping layer is then partially etched between the core cells. A dip-off of the oxide on the trapping layer is performed. And a top oxide is formed. The top oxide converts the remaining trap layer to oxide and thus isolate the trap layer.