MOSFET on SOI device
US7804134B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jan 18, 2008 |
| Grant date | Sep 28, 2010 |
| Priority date | — |
| Expiry date | Dec 7, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
Abstract
A MOSFET on SOI device includes an upper region having at least one first MOSFET type semi-conductor device formed on a first semi-conductor layer stacked on a first dielectric layer, a first conductive layer and a first portion of a second semi-conductor layer. A lower region includes at least one second MOSFET type semi-conductor device formed on a second portion of the second semi-conductor layer, a gate of the second semi-conductor device being formed by at least one conductive portion. The second semi-conductor layer is arranged on a second dielectric layer stacked on a second conductive layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.