IC chip design modeling using perimeter density to electrical characteristic correlation
US7805693B2 · kind B2 · utility
2Cited by
7References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 15, 2008 |
| Grant date | Sep 28, 2010 |
| Priority date | — |
| Expiry date | Nov 7, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/398
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
IC chip design modeling using perimeter density to an electrical characteristic correlation is disclosed. In one embodiment, a method may include determining a perimeter density of conductive structure within each region of a plurality of regions of an integrated circuit (IC) chip design; correlating a measured electrical characteristic within a respective region of an IC chip that is based on the IC chip design to the perimeter density; and modeling the IC chip design based on the correlation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.