Patent · US Active

High aspect ratio via etch

US7807583B2 · kind B2 · utility

5Cited by

1References

43Claims

0Family size

Assignee

IMEC · BE

Inventors

Joke Van Aelst · Heusden-Zolder, BE
Herbert Struyf · Kontich, BE
Serge Vanhaelemeersch · Leuven, BE

Key dates

Filing date	Jul 24, 2007
Grant date	Oct 5, 2010
Priority date	—
Expiry date	May 27, 2029

Classification

Technology area (CPC B)Performing Operations; Transporting
CPC primaryB81C2201/019
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A method for patterning high aspect ratio vias is provided. More specifically a dry etching method is provided for patterning deep vias or vias with high aspects ratios thereby eliminating the hard mask undercut. A method is provided to create (pattern) deep vias in a substrate for use in three dimensional stacked semiconductor devices and/or structures. More specifically, a method is provided for patterning deep vias with an aspect ratio up to 10 into a Si substrate with smooth via sidewalls and sufficient slope to enable metallization.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.