Gate structure
US7808019B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 20, 2008 |
| Grant date | Oct 5, 2010 |
| Priority date | — |
| Expiry date | Apr 28, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/021
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A gate structure includes a substrate, a gate dielectric layer, a first conductive layer, a second conductive layer, a cap layer and a first insulating spacer. The gate dielectric layer is disposed on the substrate. The first conductive layer is disposed on the gate dielectric layer and has an opening. A part of the second conductive layer is disposed in the opening. The second conductive layer has an extrusion that protrudes above the opening of the first conductive layer. The extrusion has a cross-sectional width less than the width of the second conductive layer inside the opening. The cap layer is disposed on the extrusion. The first insulating spacer is disposed on a part of the first conductive layer and covers the sidewalls of the extrusion. The inclusion of the extrusion in the second conductive layer decreases the resistance of the gate structure and promotes the efficiency of the device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.