Reduction of memory instability by local adaptation of re-crystallization conditions in a cache area of a semiconductor device

US7811876B2 · kind B2 · utility

Assignee

• GlobalFoundries Inc. · KY

Inventors

• Casey Scott · Dresden, DE
• Anthony Mowry · Kyle, US
• Frank Wirbeleit · Dresden, DE

Key dates

• Filing date: Aug 8, 2008
• Grant date: Oct 12, 2010
• Expiry date: Aug 8, 2028

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/038
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

By appropriately locally controlling the conditions during a re-growth process in a memory region and a speed-critical device region, the creation of dislocation defects may be reduced in the memory region, thereby enhancing overall stability of respective memory cells. On the other hand, enhanced strain levels may be obtained in the speed-critical device region by performing an efficient amorphization process and re-crystallizing amorphized portions, for instance, in the presence of a rigid material to provide a desired high strain level.