Multilayer hardmask scheme for damage-free dual damascene processing of SiCOH dielectrics
US7811926B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 26, 2008 |
| Grant date | Oct 12, 2010 |
| Priority date | — |
| Expiry date | Aug 26, 2028 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T428/31667
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Interconnect structures possessing an organosilicate glass based material for 90 nm and beyond BEOL technologies in which a multilayer hardmask using a line-first approach are described. The interconnect structure of the invention achieves respective improved device/interconnect performance and affords a substantial dual damascene process window owing to the non-exposure of the OSG material to resist removal plasmas and because of the alternating inorganic/organic multilayer hardmask stack. The latter feature implies that for every inorganic layer that is being etched during a specific etch step, the corresponding pattern transfer layer in the field is organic and vice-versa.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.