Method and apparatus providing integrated circuit having redistribution layer with recessed connectors
US7812461B2 · kind B2 · utility
1Cited by
15References
19Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 27, 2007 |
| Grant date | Oct 12, 2010 |
| Priority date | — |
| Expiry date | Jan 2, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/14
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of making a semiconductor die includes forming a trench around a conductive stud extending from the first side to a second side of a substrate to expose a portion of the stud and then forming a conductive layer inside the trench and in electrical contact with the stud.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.