Method of forming non-volatile memory having charge trap layer with compositional gradient
US7816205B2 · kind B2 · utility
4Cited by
36References
21Claims
0Family size
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Key dates
| Filing date | Oct 22, 2008 |
| Grant date | Oct 19, 2010 |
| Priority date | — |
| Expiry date | Oct 22, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02351
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A flash memory device and method of forming a flash memory device are provided. The flash memory device includes a silicon nitride layer having a compositional gradient in which the ratio of silicon to nitrogen varies through the thickness of the layer. The silicon nitride layer having a compositional gradient of silicon and nitrogen provides an increase in charge holding capacity and charge retention time of the unit cell of a non-volatile memory device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.