Semiconductor device with compressive and tensile stresses
US7816766B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 18, 2005 |
| Grant date | Oct 19, 2010 |
| Priority date | — |
| Expiry date | May 18, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
Abstract
A semiconductor device includes a gate electrode formed on a silicon substrate in correspondence to a channel region via a gate insulation film, and source and drain regions of p-type formed in the silicon substrate at respective outer sides of sidewall insulation films on the gate electrode, a pair of SiGe mixed crystal regions formed in the silicon substrate at respective outer sides of the sidewall insulation films epitaxially to the silicon substrate so as to be enclosed respectively by the source and drain regions, each of the SiGe mixed crystal regions being grown to a level above a level of a gate insulation film interface between the gate insulation film and the silicon substrate, wherein there is provided a compressive stress film at respective top surfaces of the SiGe mixed crystal regions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.