Cartesian cluster tool configuration for lithography type processes
US7819079B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 8, 2006 |
| Grant date | Oct 26, 2010 |
| Priority date | — |
| Expiry date | Jun 8, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/67745
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention generally provides an apparatus and method for processing substrates using a multi-chamber processing system (e.g., a cluster tool) that is easily configurable, has an increased system throughput, increased system reliability, improved device yield performance, a more repeatable wafer processing history (or wafer history), and a reduced footprint. In one embodiment, the cluster tool is adapted to perform a track lithography process in which a substrate is coated with a photosensitive material, is then transferred to a stepper/scanner, which exposes the photosensitive material to some form of radiation to form a pattern in the photosensitive material, and then certain portions of the photosensitive material are removed in a developing process completed in the cluster tool.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.