Nonplanar semiconductor device with partially or fully wrapped around gate electrode and methods of fabrication
US7820513B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 28, 2008 |
| Grant date | Oct 26, 2010 |
| Priority date | — |
| Expiry date | Oct 28, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/017
Abstract
A nonplanar semiconductor device and its method of fabrication is described. The nonplanar semiconductor device includes a semiconductor body having a top surface opposite a bottom surface formed above an insulating substrate wherein the semiconductor body has a pair laterally opposite sidewalls. A gate dielectric is formed on the top surface of the semiconductor body on the laterally opposite sidewalls of the semiconductor body and on at least a portion of the bottom surface of semiconductor body. A gate electrode is formed on the gate dielectric, on the top surface of the semiconductor body and adjacent to the gate dielectric on the laterally opposite sidewalls of semiconductor body and beneath the gate dielectric on the bottom surface of the semiconductor body. A pair source/drain regions are formed in the semiconductor body on opposite sides of the gate electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.