Package device having crack arrest feature and method of forming
US7821104B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 29, 2008 |
| Grant date | Oct 26, 2010 |
| Priority date | — |
| Expiry date | Dec 18, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A package device has a package substrate, a semiconductor die on the package substrate, and a molding compound on the package substrate and over the semiconductor die. The semiconductor die has a last passivation layer, an active circuit region in an internal portion of the die, an edge seal region along a periphery of the die, and a structure over the edge seal region extending above the last passivation layer, covered by the molding compound, and comprising a polymer material. The structure may extend at least five microns above the last passivation layer. The structure stops cracks in the molding compound from reaching the active circuit region. The cracks, if not stopped, can reach wire bonds in the active region and cause them to fail.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.