Structure for task based debugger (transaction-event-job-trigger)
US7823017B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 19, 2008 |
| Grant date | Oct 26, 2010 |
| Priority date | — |
| Expiry date | Sep 17, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/333
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed is a design structure for an apparatus for a task based debugger (transaction-event-job-trigger). More specifically, an integrated event monitor for a SOC comprises functional cores each having a functional debug logic element. The cores are connected to an interconnect structure that links the functional debug logic elements. Each functional debug logic element is specifically dedicated to a function of its corresponding core, wherein the functional debug logic elements generate a table of function-specific system events. The system events are function-specific with respect to an associated core, wherein the system events include transaction events, controller events, processor events, interconnect structure arbiter events, interconnect interface core events, high speed serial link core events, and/or codec events.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.