Method for integration of magnetic random access memories with improved lithographic alignment to magnetic tunnel junctions
US7825000B2 · kind B2 · utility
16Cited by
9References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 5, 2007 |
| Grant date | Nov 2, 2010 |
| Priority date | — |
| Expiry date | Sep 22, 2028 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/975
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A magnetic memory device including a Magnetic Tunnel Junction (MTJ) device comprises a substrate and Front End of Line (FEOL) circuitry. A Via level (VA) InterLayer Dielectric (ILD) layer, a bottom conductor layer, and an MTJ device formed over the top surface of the VA ILD layer are formed over a portion of the substrate. An alignment region including alignment marks extends through the bottom conductor layer and extends down into the device below the top surface of the VA ILD layers is juxtaposed with the MJT device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.