Patent · US Active

Porous substrate and its manufacturing method, and gan semiconductor multilayer substrate and its manufacturing method

US7829913B2 · kind B2 · utility

12Cited by
2References
13Claims
0Family size

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Key dates

Filing dateJun 26, 2003
Grant dateNov 9, 2010
Priority date
Expiry dateSep 5, 2026

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L21/0262
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A structure of a substrate used for growing a crystal layer of a semiconductor, particularly a group-III nitride semiconductor and its manufacturing method. The substrate comprises two porous layers on a base. The mean opening diameter of the pores of the first porous laser, the outermost layer, is smaller than the means diameter of the pores in the second porous layer nearer to the base than the first porous layer. The first and second porous layers have volume porosities of 10 to 90%. More then 50% of the pores of the first porous layer extend from the surface of the first porous layer and reach the interface between the first and second porous layers. Even by a conventional crystal growing method, an epitaxial crystal of low defect density can be easily grown on the porous substrate.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.