Method for performing erasing operation in nonvolatile memory device
US7830717B2 · kind B2 · utility
4Cited by
5References
19Claims
0Family size
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Key dates
| Filing date | Jun 9, 2008 |
| Grant date | Nov 9, 2010 |
| Priority date | — |
| Expiry date | Nov 6, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/16
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for performing erasing operation in a nonvolatile memory device includes the steps of applying an erasing voltage to P-wells of a selected memory cell block which is composed of a plurality of strings in each of which a plurality of memory cells and side memory cells are connected in series; performing soft programming operation by applying a soft programming voltage to word lines of the selected memory cell block; and programming the side memory cells by applying a programming voltage to the side memory cells.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.