Semiconductor memory device
US7835171B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 11, 2008 |
| Grant date | Nov 16, 2010 |
| Priority date | — |
| Expiry date | Feb 7, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/79
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A resistance variable memory reduces the nonuniformity of resistance values after programming, so that a rewrite operation can be performed on a memory cell at high speed. A reference resistor is connected in series with the resistance variable memory cell, and a sensor amplifier detects whether the potential at an intermediate node between the memory cell and the reference resistor exceeds a given threshold voltage, so as to stop the write operation based on a detection result.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.