Methods of erase verification for a flash memory device
US7835190B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 12, 2008 |
| Grant date | Nov 16, 2010 |
| Priority date | — |
| Expiry date | Jan 31, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/0483
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods and apparatus are disclosed, such as those involving a flash memory device that includes a memory block. The memory block includes a plurality of data lines extending substantially parallel to one another, and a plurality of memory cells. One such method includes erasing the memory cells; and performing erase verification on the memory cells. The erase verification includes determining one memory cell by one memory cell whether the individual memory cells coupled to one of the data lines have been erased. The method can also include performing a re-erase operation that selectively re-erases unerased memory cells based at least partly on the result of the erase verification.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.