Patent · US Active

Highly selective liners for semiconductor fabrication

US7838370B2 · kind B2 · utility

42Cited by

1References

20Claims

0Family size

Assignee

TEXAS INSTRUMENTS INCORPORATED · US

Inventors

Narendra Singh Mehta · Santa Clara, US
Wayne Bather · Plano, US
Ajith Varghese · McKinney, US

Key dates

Filing date	Dec 27, 2007
Grant date	Nov 23, 2010
Priority date	—
Expiry date	Jun 20, 2028

Classification

Technology area (CPC H)Electricity
CPC primaryH10D84/038
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A method for manufacturing an isolation structure is disclosed that protects the isolation structure during etching of a dichlorosilane (DCS) nitride layer. The method involves the formation of a bis-(t-butylamino)silane-based nitride liner layer within the isolation trench, which exhibits a five-fold greater resistance to nitride etching solutions as compared with DCS nitride, thereby allowing protection against damage from unintended over-etching. The bis-(t-butylamino)silane-based nitride layer also exerts a greater tensile strain on moat regions that results in heightened carrier mobility of active regions, thereby increasing the performance of NMOS transistors embedded therein.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.